OpenFPGA
master

Overview

  • Why OpenFPGA?
  • Technical Highlights

Tutorials

  • Getting Started
  • Design Flows
  • Architecture Modeling

User Manual

  • OpenFPGA Flow
    • OpenFPGA Flow
    • OpenFPGA Task
  • OpenFPGA Architecture Description
  • OpenFPGA Shell
  • FPGA-SPICE
  • FPGA-Verilog
  • FPGA-Bitstream
  • File Formats

Developers Manual

  • Version Number
  • Backward compatibility
  • CI/CD setup
  • Regression Tests
  • Tcl API

Appendix

  • Contact
  • Acknowledgement
  • Publications & References
OpenFPGA
  • Docs »
  • <no title> »
  • OpenFPGA Flow
  • Edit on GitHub

OpenFPGA FlowΒΆ

  • OpenFPGA Flow
    • Basic Usage
    • OpenFPGA Variables
    • Output
    • Advanced Usage
    • Detailed Command-line Options
    • OpenFPGA Flow Configuration file
  • OpenFPGA Task
    • Task Directory
    • Running OpenFPGA Task:
    • Command-line Options
    • Creating a new OpenFPGA Task
    • Configuring a new OpenFPGA Task
    • Example Task Configuration File
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© Copyright 2018, Xifan Tang Revision a3319bf5.

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